1. Field of the Invention
The present invention relates to circuits providing a current proportional to an input voltage, and more particularly to such a circuit that can be easily fabricated in the form of an integrated circuit.
2. Discussion of the Related Art
FIG. 1 schematically shows a circuit conventionally used for voltage/current conversion. Such circuit includes two NPN-type bipolar transistors, Q1 and Q2, having their collectors connected to a high voltage VCC and their emitters connected to a low voltage VEE through current sources I. Emitters are interconnected through a resistor R1. The collector currents of these transistors are referenced IC1 and IC2. The voltage Ve to be converted into a current is applied between the bases B1 and B2 of transistors Q1 and Q2. Thus, the voltage V(R1) across R1 is: EQU V(R1)=Ve (Vbe2-Vbe1).
The current .DELTA.I in resistor R1 is .DELTA.I=V(R1)/R1. The emitter current of Q1 is I+.DELTA.I, and the emitter current of Q2 is I-.DELTA.I. Assuming that the base-emitter voltage drops Vbe1 and Vbe2 of transistors Q1 and Q2 are equal, and that the difference of the emitter currents is equal to the difference of the collector currents, then IC1-IC2=2.DELTA.I=2Ve/RI.
A conventional circuit 10, for example of the current mirror type, provides the difference between currents IC1 and IC2 and provides at the output a current 2.DELTA.I that is proportional to Ve.
In the above discussion, two simplified assumptions have been considered. The first assumption is that Vbe1=Vbe2; the second assumption is that the difference in the emitter currents is equal to the difference of the collector currents. In fact, the collector currents of transistors Q1 and Q2 are IC1=.alpha.(I+.DELTA.I) and IC2=.alpha.(I-.DELTA.I), where .alpha. is the common-base current gain of transistors Q1 and Q2 (it is assumed that the two transistors have the same gain). .alpha. is expressed as a function of the common-emitter current gain, .beta., of transistors Q1 and Q2 by the relation .alpha.=1/(1+1/.beta.). Thus, current .DELTA.I, instead of being simply equal to Ve/R1 is in fact expressed by the relation: EQU .DELTA.I=.alpha.[Ve+(Vbe2-Vbe1)]/R1.
Thus, a first error is due to the value of Vbe2-Vbe1 that is non-zero and varies with the current and temperature. The second error is due to the fact that .alpha. is not equal to 1, and the variation of .alpha. can be non-negligible when .beta. is relatively low. For example, if .beta.=35, .alpha. is equal to 0.97; so, the proportion error is approximately 3%.
A conventional manner to correct the first error is illustrated in FIG. 2. A negative feedback is imposed between the emitter and the base of each transistor Q1 and Q2 through differential amplifiers A1 and A2 whose outputs are applied to the bases of transistors Q1 and Q2, respectively, and whose inverting inputs are connected to the emitters of transistors Q1 and Q2, respectively. The input signal is applied between the non-inverting inputs E1 and E2 of amplifiers A1 and A2. Thus, the error associated with the non-zero value of Vbe2-Vbe1 is attenuated by a factor AV, where AV is the voltage gain of each amplifier A. This gain can be very high, for example higher than 100, and the slight error in the difference of the base-emitter voltages thus becomes an error of the second order, substantially lower than 1:1000.
A conventional method to correct the second error is to substitute a Darlington-type circuit for each transistor Q1 and Q2. As is shown in FIG. 3, each transistor Q1 and Q2 is associated with a respective Darlington-connected transistor Q'1 and Q'2. Considering that transistors Q1, Q2, Q'1 and Q'2 have the same common-emitter current gain, .beta., the common-base current gains .alpha. become 1[1+1/.beta.(.beta.+1)]. Again, an error of the first order is changed into an error of the second order, that becomes negligible.
Thus, the circuit of FIG. 3 that combines the correction means of the first and second type of error is satisfactory and provides currents IC1 and IC2 whose difference is proportional (the proportion ratio being associated with the value of resistor R1) to the difference in voltage between terminals E1 and E2.
However, this circuit has a drawback inherent in the presence of a Darlington-type circuit. Indeed, when considering a single transistor such as transistor Q1 or Q2, its collector/emitter voltage drop at the conducting state, Vsat, is approximately 0.2 volt. Whereas, in the case of a Darlington circuit, this voltage drop is increased by the mean value of a base-emitter voltage drop, that is, the total voltage drop approaches a value of approximately 1 volt. This phenomenon is aggravated at low temperatures where Vbe increases. This relatively high voltage drop across the transistors is a drawback especially due to the fact that, as illustrated in FIG. 1, there are additional transistor stages between the high supply voltage and the low supply voltage (between VCC and VEE). This requires that the difference VCC-VEE must be higher in the case of the circuit of FIG. 3 than in the case of the circuit of FIG. 1 and does not allow the use of the circuit of FIG. 3 when this voltage difference (supply voltage) is low.